
FPGA Prototyping & Emulation Developer - SMTS/MTS
Job Description
Req. ID:
JR102527 FPGA Prototyping & Emulation Developer - SMTS/MTS
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Role Type: SMTS/MTS
Domain: Memory-Centric FPGA Prototyping & Emulation | DDRx/LPDDRx Integration | System Debug & Validation
Role Summary
As an FPGA Prototyping & Emulation Engineer, you will design, build, and scale FPGA-based platforms to enable next gen memory centric solutions. You will work across RTL, system integration, and debug to accelerate time-to-market for complex silicon programs.
Key Responsibilities:
FPGA Prototyping & Emulation
- Develop and maintain FPGA prototypes/emulation environments for SoC/IP validation
- Perform RTL integration, partitioning, synthesis, and timing closure
- Support multi-FPGA bring-up and scalability for large SoCs
Interface & System Integration
- Integrate and validate interfaces such as PCIe, USB, UFS, Ethernet (EMAC), I2C, SPI, UART
- Enable memory controller development and interfacing.
- Enable DDR/memory subsystem integration in prototyping environments
- Collaborate with design teams to ensure functional correctness and performance alignment
Debug & Bring-Up
- Debug system-level issues across RTL / integration, clocks, resets, CDC, firmware/software interactions
- Support early software bring-up and system validation on FPGA platforms
- Build debug visibility (probes, traces, instrumentation)
Automation & Flow Optimization
- Improve prototyping/emulation flow efficiency (build, deploy, validate cycles)
- Develop automation using Python / Tcl for regression runs, platform configuration, debug trace collection
Minimum Qualifications:
- 10 -20+ years of experience in FPGA Design/FPGA Prototyping (A Must).
- Good understanding of RTL Integration, SystemVerilog, Verilog, Timing Closure, STA, CDC, Multi-FPGA
- Familiarity with memory controller, DDR interfaces and memory subsystem integration.
- Familiarity with high-speed and low speed protocols such as PCIe, UFS, USB, EMAC, I2C, SPI, UART.
- Good understanding of SoC architecture and verification methodologies.
- Strong debugging and problem-solving skills.
- Experience with scripting languages (Python, TCL) for automation.
- Exposure to software bring-up on FPGA/emulation platforms.
Basic Qualifications:
- Bachelor’s or Master’s degree in Electrical/Electronics Engineering or related field with 10+ years of experience, OR
- PhD with 10+ years of experience.
Job Profile(s):
Systems Design Engineering SMTS
Relocation level: (TBD)
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