
TD NAND CMOS Process Integration, Principal/MTS Engineer Lead
Job Description
Req. ID:
JR101347 TD NAND CMOS Process Integration, Principal/MTS Engineer Lead
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
As NAND CMOS Process Integration Principal/MTS Engineer Lead in technology department team at Micron Technology Inc. Singapore, you will be leading a team whose responsibility is to design, develop, integrate and implement innovative and effective CMOS device and process solutions to improve NAND product yield, reliability, and quality with competitive cost and performance within the required timelines.
You and the team will be collaborating with various departments including process, yield, quality, probe, media health, design, and product engineering to achieve the goals. You must be able to engage and manage a highly technical group that provides and implements high quality solutions to problems in a very fast paced and changing environment.
Teamwork and the ability to communicate very complex problems and solutions to both internal and external groups as well as culture of excellence are essential to your success along with providing psychologically safe and inclusive environments.
Your responsibilities will include, but are not limited to, the following:
- Hire, develop, and manage a team of CMOS device and integration engineers and technicians including dotted team members.
- Manage performance and provide regular feedback. Provide guidance, develop, and coach the team members to be ready to excel to the next level. Lead the team by example.
- Adapts communication style to engage and motivate team members as well as provide advice and feedback to senior leaders on the assigned projects or issues.
- Define and develop NAND CMOS to meet technology requirements, structural and electrical specifications. Refine as necessary.
- Develop the team with thorough understanding of the architecture, layout, inline and electrical metrics across past, current, and future NAND technologies. Drive proactive and reactive changes needed to enhance the capability of the module. Be proficient with all software/tools required in this regard.
- Develop new CMOS technology that meets Integration Module Maturity Index (IMI) and Device Maturity Index (DMI) requirements.
- As the resident device and structural CMOS PI in charge, set priorities for the technology program and actively garner support for these priorities within the TD process engineering/integration resources and if need be, F10, and Boise TD. Continually monitor yield and product performance metrics and drive projects to improve the yield and quality of NAND products to meet required technology breakthroughs.
- Continuously improve CMOS team technology approaches and business processes to meet customer needs and adapt to the changing landscape.
- Develop, communicate, and coordinate the execution of structural improvement strategy for the modules you are responsible for with partners across TD, manufacturing, and product engineering.
- Be accountable for the evaluation and development of new modules and devices towards integration into future tech nodes.
- Design and implement quality experiments to improve module performance and explore process windows.
- Drive cross-functional teams to address module performance deficiencies and technology gaps. Continuously engage with engineers and leaders from multi-functional teams and collect feedback to set development strategies towards enhancing module capability.
- Optimize existing process flows, conceptualize and pro-actively initiate and work towards technical innovative solutions with worldwide impact, visibility, and recognition to closure.
- Undertake development projects to evaluate and introduce new integration schemes for alpha and derivative products, as well as establish proof of concept for future tech nodes at manufacturing facility.
- Regularly update the status of the team projects to senior management.
- Take on leadership role at quarterly yield summits and program reviews in summarizing complex problems, deriving and explaining actions taken to address them and getting alignment across TD, manufacturing and senior management.
- Able to initiate and set up various systems and operation models to enable effective engagement within the team and partners.
- Support the transfer, documentation, and training of the structure/CMOS fundamentals into manufacturing.
- Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.
- Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work.
Qualifications:
- MS (required) or PhD (Preferred) in Electrical Engineering, Microelectronics, Material Science or a related field.
- Minimum of 5 years of experience in the semiconductor industry with thorough process integration understanding, development, and execution within and across modules; strong organizational and technical skills with demonstrated success in engagement with worldwide teams.
- Strong background in CMOS integration, scaling, and device physics.
- Must have in-depth understanding of layout, architecture, inline and electrical metrics including bench data with proven ability to understand and link them to corrective structural process/module improvements.
- In-depth knowledge of and direct experience with nonvolatile memories along with good understanding of the NAND process flow, interaction of process, device, common yield and reliability issues.
- Exposure to TD is preferred; prior experience in DRAM and/or NAND research and development is an added advantage.
- Self-motivated, self-governing with proven ability to work in a demanding and dynamic environment.
- Committed individual with integrity and dedication to understand and meet customer needs and ability to coordinate cross-functional teams to achieve the goals.
- Proven ability to be a collaborative “team builder” with strong focus on effective team dynamics and distributed responsibility.
- Must have a proven track record to train and develop team members in NAND structure concepts and all software needed to undertake comprehensive analysis.
- Proven ability to solicit feedback, accept input, and analyze success and failure to improve personal and team effectiveness.
- Must demonstrate capacity to instill a department culture within each team member based on company core values.
- Must place emphasis on strategic management of group morale, and develop collaborative and integrated atmosphere, using all available resources to the fullest
- Ability to lead multiple tasks with excellent verbal and written communication, problem solving, and solid analytical skills. Able to transform and simplify complex to clear and concise information to fit audiences need.
- Curiosity and natural tendency of learning new things independently.
- Ability to travel for extended periods of time to the US for collaborative TD work.
- Ability to apply baseline digital fluency and role‑appropriate AI literacy to use AI‑enabled tools responsibly and effectively for research, analysis, content creation, problem‑solving, operational tasks, and achieving business outcomes.
Job Profile(s):
Semiconductor Process Eng MTS
Relocation level: (TBD)
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