Electrical Design Engineer

Our mission is to provide real-time on-orbit connectivity for critical missions, enabling a new era of data-driven intelligence and innovation. With 33 satellites launched to date, Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities. 

Key Responsibilities:

• Develop hardware solutions to support Kepler’s space technology that requires the utilization of leading technology and practices

• Support design reviews for active designs to minimize design gaps

• Conduct and document engineering analysis including derating, reliability, radiation, EMI/EMC, FMECA, and power budgets

• Support pathfinding development for future satellite generations that will utilize new technology and interfaces including UFS, 10G+ Ethernet, PCIE5, various other high-speed interfaces, new memory technology, and processors 

• Maintain technical documentation that captures design decisions, design specifications, block diagrams, interface requirements, and system architecture reports

• Develop full product solutions by working closely with other cross-functional engineering teams including RF, mechanical, software, and FPGA

Required Skills & Qualifications:

• Bachelor's Degree in Electrical Engineering or equivalent

• 4+ years of experience designing, developing, and validating complex electronic hardware systems from concept through production, with demonstrated ownership of technical deliverables and successful design execution

• Proven ability to lead hardware development efforts from concept definition through schematic design, PCB layout and/or layout oversight, integration, verification, and design validation testing

• Strong proficiency with industry standard schematic capture and PCB layout tools such as Altium Designer or equivalent

• Proven experience integrating processors, FPGAs, and SoCs into high-performance embedded systems, including successful implementation and debugging of high-speed digital interfaces

• Ability to design and validate mixed-signal circuitry incorporating ADCs, DACs, sensors, and precision analog signal chains while meeting performance requirements such as noise, accuracy, and dynamic range

• Demonstrated success implementing and troubleshooting high-speed interfaces such as JESD204B, Ethernet (1G/10G+), PCIe, or equivalent protocols, including signal integrity considerations and laboratory validation 

• Familiarity with clocking architectures, oscillator selection, timing distribution, and synchronization requirements in complex digital systems

• Proven capability designing passive and active analog signal-conditioning circuits, including filter design, analysis, and validation   

• Ability to identify technical risks early, develop mitigation strategies, and drive resolution through design reviews, testing, and cross-functional collaboration

• Strong hands-on debugging and root-cause analysis skills with experience using oscilloscopes, spectrum analyzers, multimeters, logic analyzers, and other laboratory equipment to validate hardware performance and resolve complex issues

• Ability to develop test plans, execute validation activities, analyze results, and clearly communicate findings and recommendations

• Strong written and verbal communication skills, with the ability to produce comprehensive design documentation including requirements, specifications, interface definitions, test plans, and engineering reports

• Demonstrated success collaborating across multidisciplinary teams including RF, FPGA, software, systems, mechanical, manufacturing, and test engineering to deliver integrated product solutions

Bonus Points:

• Master's Degree in Electrical Engineering or equivalent
• Ability to develop interface control requirements and system-level integration strategies that enable successful hardware, software, FPGA, and subsystem interoperability
• Experience conducting and documenting analyses such as reliability assessments, derating evaluations, FMECA, power budgets, EMI/EMC assessments, and environmental qualification planning
• Experience designing memory subsystems utilizing technologies such as QSPI, eMMC, DDR3/DDR4, UFS, or similar, including interface bring-up, timing validation, and performance characterization
• Experience designing power distribution, monitoring, and fault-management architectures, including implementation of health monitoring, protection mechanisms, and FDIR concepts