Principal Firmware Engineer
Job Description
Microsoft Silicon and Cloud Hardware Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Skype, OneDrive and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high energy engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and HW infrastructure on time, in high volume with high quality and lowest cost is of paramount importance.The FW CoE is responsible for HW/FW for Azure Infrastructure. We are working on the next generation HW/FW for server, silicon and rack infrastructure with a focus on innovation in firmware technology to secure Azure infrastructure for Microsoft and their customers.
We are looking for a highly motivated Principal Firmware Engineer with a background in Silicon design, firmware development, validation, and debug to work on lighting up the various features and technologies as each team produces their part. You must have experience with SoC Architecture and Design, Bring-Up of new silicon and platform, root causing issues at the intersection of multiple subsystems across firmware and hardware. #AzureHWJobs #SCHIE #SCHIEFWCOE
Responsibilities
- Architect and develop SoC validation firmware and framework solution that enable multiple teams like design verification, silicon validation, firmware development and manufacturing teams to test IP and SoC features.
- Enable debug features and integration and enabling of debug infrastructure.
- Lead and drive root cause analysis of complex silicon issue debug spanning RTL and firmware.
- Technically Lead a small team of experience and high motivated engineers in delivering products
- Architecture and development of specific IP level firmware libraries .
- Defining the boot flow sequences for initial bring up (Silicon initialization, memory training..) and leading early silicon bring up and enabling of manufacturing .
- Collaborate with SoC architects to influence hardware features for usability , debuggability . Collaborating with Silicon validation teams to root cause hardware and firmware issues .
- Collaborate with cross Geo teams and drive program execution and deliver Products
Qualifications
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
- OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
- OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
- OR equivalent experience.
- Firmware architect with 15+ years of industry experience with 5+ years in defining and driving the SoC architecture particularly server class SoC’s.
- Experience in SoC architecture particularly ARM based SoC micro architecture(ARM v8/v9), firmware design, design verification.
- Silicon bringup and post silicon validation Experience
- Experience in a few IP level silicon firmware library development (e.g PCIe, CXL, GIC, Interrupt controller, security processors, IOMMU, SMMU ) .
- SoC debug expertise and experience and experience in using tools like JTAG ARMDS, Lauterbach TRACE32
- Experience in ATE environment and initial wafer bring up is desirable and a good knowledge of Platform, security (trust Zones etc)firmware
- Understanding of OS Linux Windows driver development is desirable
- Experience in leading a small team of engineers is desirable
Firmware Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.