Staff Product Engineer

Role Summary: OSAT Staff/ Senior PE responsible for driving assigned products NPI-to-HVM execution including test yield, quality, and productivity improvements, while ensuring alignment across Product Engineering, Test Engineering, Design, Fab Foundries, OSATs, and Business Units. It is a highly technical role responsible for product ownership across multiple Outsourced Assembly and Test sites. This role requires deep semiconductor product, test, yield, quality, and data analytics expertise to resolve complex product-specific issues from NPI through HVM, while making engineering-based decisions that directly affect product release, yield recovery, quality containment, customer risk, cost, and manufacturing continuity. OSAT PE translate product behavior, test results, yield signals, reliability indicators, and OSAT execution constraints into actionable engineering direction, ensuring that products are manufacturable, testable, reliable, cost-effective, and ready for sustained high-volume production. Responsibilities / Accountabilities: NPI → HVM Ramp & Execution Excellence

• Ensure smooth ramp of New Product Introduction (NPI) into High Volume Manufacturing (HVM) for assigned products

• Drive rapid issue resolution related to product yield, test coverage, quality escapes, test time reduction, and cost optimization through disciplined cross-functional collaboration.

• Ensure manufacturing readiness, risk mitigation, and adherence to Product Development PDE gate execution models.

Test Yield, Quality & Reliability Improvement

• Drive test yield performance management, including yield trend monitoring, Pareto analysis, systematic yield dip diagnosis, and gap closure.

• Drive statistical analysis (SPC, GR&R, Cp/Cpk), quality & ESD compliance and data-driven root cause investigations across wafer probe and final test.

• Collaborate closely with Design, Product Engineering, Fab Foundries, Test Engineering, and Equipment teams to close yield and quality gaps against business targets.

Quality Monitoring and Problematic Lot Disposition Leadership

• Investigation and disposition of problematic materials, including on-hold wafer lots and package test failures.

• Perform deep-dive failure analysis, parametric correlation, and historical trend analysis to ensure timely and quality-compliant decisions.

Test Program Verification, Correlation & Release

• Collaborate with Test Engineering and Application Engineering on test program development, verification, correlation, validation, and release.

• Ensure alignment between bench, characterization, ATE, probe, and final test results before production release.

• Drive robust guard-banding, limits optimization, and test coverage integrity to prevent test escapee.

Global Stakeholder Alignment & Strategy Deployment

• Maintain strong collaboration with Business Unit PDE/TDE, Global Advance Test Engineering (GATE), Application Engineering, and Manufacturing Operations.

• Ensure alignment on test strategy, platform roadmap, cost, capacity, and deployment plans across regions.

Learning Development & Continuous Improvement

• Build, Manage, Drive PE competency with continuous leaning development of new skills or new technology and adhere continuous improvement & Lean culture, PDCA with Plan of Record (POR) & Plan of Action (POA).

Requirements:

• Bachelor’s degree in Electronic/Electrical Engineering with a minimum of 8 years of semiconductor industry related experience

• Understanding RF communication systems and RF front end component technologies. Experience working on test equipment such as ATE RF tester, handler or probers and application lab bench tools

• Committed individual who is willing to travel APAC wide and put in extra hours as required on business needs

• Good in Data Analytics, communication skills in English and problem articulation

• Experienced in Lean Manufacturing, PDCA, DMAIC knowledge and POR, POA execution

• Experienced in using JMP, Spotfire, Power BI, Data Science, AI/AGI tools in data analytics and productivity improvement