Junior/Senior Memory Design Engineer (NVM) (Semiconductor)

Job Description

• Develop architecture and execute end-to-end circuit design for embedded Non-Volatile Memory (NVM) IP, including conventional memory technologies such as eFUSE and eFlash, as well as next-generation memory solutions like MRAM and RRAM.

• Collaborate with and provide technical guidance to layout engineers in the physical implementation of NVM memory arrays and associated analog peripheral circuits.

• Assist in the development of NVM IP Design Kits (DK), including deliverables such as Verilog models, Liberty files, datasheets, bitmaps, and related documentation.

• Support the design, implementation, and validation of NVM-related test chips.

Requirements

• Bachelor's or Master's degree in Microelectronics or a related discipline.

• Minimum 3 years of hands-on experience in transistor-level analog and mixed-signal circuit design.

• Experience in at least one of the following memory technologies: eFUSE, eFlash, MRAM or RRAM.

• Strong proficiency with industry-standard analog EDA tools, including Cadence Virtuoso, Spectre, HSPICE, XA, FINESIM, and similar platforms for custom circuit design and simulation.

• Prior exposure to NVM chip testing and failure analysis is an advantage.

• Familiarity with advanced semiconductor process technologies, including CMOS, FinFET and FD-SOI, with experience designing across multiple process nodes.

Interested candidates who wish to apply for the advertised position, please click 'APPLY' to submit your application EA License No: 13C6305 Reg. No.: R1874608 (Lee Jia Hou) For candidate who applied for the advertised position is deemed to have consented to us that we may collect, use or disclose your personal information for purpose in connection with the services provided by us